/*_____________________________________________________________________________
||
|| STM32 Baremetal Driver: GPIO
||
|| Jinfeng Zhuang, 2024.W18
||
|| Additional Feature: SWIP wrapper
||_____________________________________________________________________________
*/

typedef volatile unsigned int VU32;

enum GPIO_e
{
    PA0 = 0 << 16 | 0,
    PA1 = 0 << 16 | 1,
    PA2 = 0 << 16 | 2,
    PA3 = 0 << 16 | 3,
    PA4 = 0 << 16 | 4,
    PA5 = 0 << 16 | 5,
    PA6 = 0 << 16 | 6,
    PA7 = 0 << 16 | 7,
    PA8 = 0 << 16 | 8,
    PA9 = 0 << 16 | 9,
    PA10 = 0 << 16 | 10,
    PA11 = 0 << 16 | 11,
    PA12 = 0 << 16 | 12,
};

typedef struct
{
  VU32 CRL;
  VU32 CRH;
  VU32 IDR;
  VU32 ODR;
  VU32 BSRR;
  VU32 BRR;
  VU32 LCKR;
} GPIO_TypeDef;

static void rcc_enable(U32 base, U32 ip, U32 enable)
{
    RCC_TypeDef *RCC = (RCC_TypeDef*)base;

    if (enable)
    {
        RCC->APB2ENR |= 1 << 0; // RCC->AHBENR // APB1ENR
    }
    else
    {
        RCC->APB2ENR &= ~(1 << 0);
    }
}

// Unit: Hz
static U32 rcc_clock_get(U32 base, U32 ip)
{
    
}

/*_____________________________________________________________________________
||
|| Wrapper of SWIP
||
|| Include Port related macros.
|| Self compile code, if user want use it, redefine the macros.
||
*/

#ifndef RCC_BASE
#define RCC_BASE (0x0)
#endif

U32 swip_soc_gpio(U32 ip, U32 cmd, U32 param1, U32 param2)
{
    
}